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Microchip Technology /ATSAMV71J20 /PMC /PCK[4]

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Interpret as PCK[4]

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SLOW_CLK)CSS0PRES

CSS=SLOW_CLK

Description

Programmable Clock Register (chid = 0) 0

Fields

CSS

Programmable Clock Source Selection

0 (SLOW_CLK): SLCK is selected

1 (MAIN_CLK): MAINCK is selected

2 (PLLA_CLK): PLLACK is selected

3 (UPLL_CLK): UPLLCKDIV is selected

4 (MCK): MCK is selected
PRES

Programmable Clock Prescaler

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data